16576949-Hdl-Manual

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HDL Lab Manual H.D.L – LAB For IV Semester B.E Electronics and Communication Engineering (As per VTU Syllabus) Guided By USHA B.S (Asst.prof) By POORNIMA.L Dept of E&CE, SCE 1 HDL Lab Manual R.N.SHETTY INSTITUTE OF TECHNOLOGY Channasandra, Bangalore-560061 HDL LABORATORY MANUAL (06ESL48) DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING Dept of E&CE, SCE 2 HDL Lab Manual 2008 INDEX SL.NO NAME OF THE EXPERIMENT 1 LOGIC GATES 2 ADDERS AND SUBTRACTORS 3 COMBINATIONAL DESIGNS a.2 TO
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  HDL Lab Manual H.D.L – LAB For IV Semester B.EElectronics and Communication Engineering(As per VTU Syllabus) Guided By USHA B.S (Asst.prof)ByPOORNIMA.L Dept of E&CE, SCE1  HDL Lab Manual R.N.SHETTY INSTITUTE OF TECHNOLOGYChannasandra, Bangalore-560061 HDLLABORATORY MANUAL(06ESL48) DEPARTMENTOFELECTRONICS & COMMUNICATION ENGINEERING Dept of E&CE, SCE2  HDL Lab Manual 2008 INDEX Dept of E&CE, SCE SL.NONAME OF THE EXPERIMENTPAGE NO1LOGIC GATES62ADDERS AND SUBTRACTORS103COMBINATIONAL DESIGNSa.2 TO 4 DECODER b.8 TO 3 ENCODER c.8 TO 1 MULTIPLEXER d.4 BIT BINARY TO GRAY CONVERTER e. MULTIPLEXER, DE-MULTIPLEXER,COMPARATOR 144FULL ADDER(3 MODELING STYLES)32532 BIT ALU USING THE SCHEMATIC DIAGRAM376FLIP-FLOPS (SR, D, JK AND T)4074 BIT BINARY,BCD COUNTERSSYNCHRONOUS & ASYNCHRONOUS COUNTERS4589ADDITIONAL EXPERIMENTSRING COUNTER JHONSON COUNTER INTERFACING1DC AND STEPPER MOTOR482EXTERNAL LIGHT CONTROL513WAVEFORM GENERATION USING DAC524SEVEN SEGMENT DISPLAY56 3  HDL Lab Manual EXPERIMENTS LIST (ACCORDING TO VTU SYLLABUS) PROGRAMMING (using VHDL and Verilog)1.Write HDL code to realize all the gates.2.Write a HDL program for the following combinational designsa. 2 to 4 decoderb. 8 to 3 (encoder without priority & with priority)c. 8 to 1 multiplexerd. 4 bit binary to gray convertere. Multiplexer, de-multiplexer, comparator.3. Write a HDL code to describe the functions of a full adder using three modeling styles.4. Write a model for 32 bit ALU using the schematic diagram shown belowA(31:0). ã ALU should use the combinational logic to calculate an output based on the fourbit op-code input. ã ALU should pass the result to the out bus when enable line in high, and tri-statethe out bus when the enable line is low. ã ALU should decode the 4 bit op-code according to the given in example below. Dept of E&CE, SCE OPCODEALU OPERATION1.A+B2.A-B3.A Complement4.A*B5.A AND B6.A OR B7.A NAND B8.A XNOR B 4   Opcode(3:0)Enable
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